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SPI接口音频Codec实验
- ALTERA NIOS处理器，VHDL语言在QUARTUS编译通过，然后有C语言在NIOS SHELL下驱动，实验音频解码-Altera NIOS processor, the QUARTUS VHDL compiler, then the C language under NIOS SHELL-driven, experimental audio decoder
simple_spi
- complete spi core written in vhdl. its easy to use and can be configured to operate at various clock frequencies. tested on an ADC to verify the operation
spi
- SPI的两个程序，一个收，一个发，完整的工程-SPI' s two programs, an income, a hair
l1ghVhVI
- The VSPI core implements an SPI interface compatible with the many -- serial EEPROMs, and microcontrollers. The VSPI core is typically used -- as an SPI master, but it can be configured as an SPI slave as well.
code
- spi接口 实现spi的传送 包括主从模式，时钟的建立。和数据的传送三部分-spi code very good for spi
spi_write
- 对spi接口的flash操作，用VHDL语言实现，read，write，擦除的接口电路控制-Spi interface on the flash operation, with the VHDL language, read, write, erase controls the interface circuit
SpiMaster
- This a verilog code for SPI Master testbench is also provided spi_top.v Xilinx ISE or Icarus verilog to compile and simulate-This is a verilog code for SPI Master testbench is also provided spi_top.v Xilinx ISE or Icarus verilog to compile an
spi
- SPI接口函数，实现双向通讯，速度12Mbps-SPI interface functions, two-way communication, speed of 12Mbps
spiflash
- VHDL language to read and write of the SPI FLASH
spi_dac
- driver for spi DAC in VHDL
SPI-Flash
- 基于Xilinx-SPartan 3an FPGA 的与单片机 SPI 接口 参考设计-SPI interface base of Xilinx Spartan 3AN kid
fm25h20
- spi接口，DSP发送数据，FPGA缓存起来，然后通过spi口写进fm25h20芯片里面-Spi interface, DSP send data, FPGA, and then through the spi cache up mouth written into fm25h20 chip inside
spi-vhdl
- 用vhdl写的spi通信，arm为主设备，fpga为从设备，其中包括代码，以及具体协议-failed to translate
VHDL-SPI-Module
- This an small program which write in VHDL it is mainly used to read/write serial data by SPI model -This is an small program which write in VHDL it is mainly used to read/write serial data by SPI model
SPI
- VHDL SPI 用于实现SPI通信回传，方便大家学习交流，谢谢各位网友支持
verilog_spi-master
- verilog_spi A simple demo SPI interface implemented in verilog
spiVerilog-master
- spiVerilog A Verilog SPI module
SPI
- 使用VHDL写的SPI Master模块(Using the SPI Master module written in VHDL)
spi
- 利用VHDL在FPGA内实现SPI总线的主从控制器设计(SPI Master and Slave Controller)
spi_slave
- 使用VHDL语言写的程序，利用SPI协议实现串并转换电路(Programs written in VHDL language and series-to-parallel conversion circuit implemented by SPI protocol)